<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Aslett, Robert</style></author><author><style face="normal" font="default" size="100%">Buck, Robert J.</style></author><author><style face="normal" font="default" size="100%">Duvall, Steven G.</style></author><author><style face="normal" font="default" size="100%">Jerome Sacks</style></author><author><style face="normal" font="default" size="100%">Welch, William J.</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Circuit optimization via sequential computer experiments: design of an output buffer</style></title><secondary-title><style face="normal" font="default" size="100%">Journal of the Royal Statistical Society: Series C</style></secondary-title></titles><keywords><keyword><style  face="normal" font="default" size="100%">Circuit simulator</style></keyword><keyword><style  face="normal" font="default" size="100%">Computer code</style></keyword><keyword><style  face="normal" font="default" size="100%">Computer model</style></keyword><keyword><style  face="normal" font="default" size="100%">Engineering design</style></keyword><keyword><style  face="normal" font="default" size="100%">Parameter design</style></keyword><keyword><style  face="normal" font="default" size="100%">Stochastic process</style></keyword><keyword><style  face="normal" font="default" size="100%">Visualization</style></keyword></keywords><dates><year><style  face="normal" font="default" size="100%">1998</style></year></dates><volume><style face="normal" font="default" size="100%">47</style></volume><pages><style face="normal" font="default" size="100%">31-48</style></pages><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">&lt;p&gt;In electrical engineering, circuit designs are now often optimized via circuit simulation computer models. Typically, many response variables characterize the circuit’s performance. Each response is a function of many input variables, including factors that can be set in the engineering design and noise factors representing manufacturing conditions. We describe a modelling approach which is appropriate for the simulator’s deterministic input–output relationships. Non-linearities and interactions are identified without explicit assumptions about the functional form. These models lead to predictors to guide the reduction of the ranges of the designable factors in a sequence of experiments. Ultimately, the predictors are used to optimize the engineering design. We also show how a visualization of the fitted relationships facilitates an understanding of the engineering trade-offs between responses. The example used to demonstrate these methods, the design of a buffer circuit, has multiple targets for the responses, representing different trade-offs between the key performance measures.&lt;/p&gt;
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